The development and production of an integrated circuit is relatively lengthy and costly. The technologies used for the manufacture of integrated circuits currently change every eighteen months. These circuits are generally used as library circuits for the design of bigger circuits. For complex circuits, such as microprocessors, a transposition of the circuit is necessary to make the circuit compatible with the new technology.
Furthermore, when carrying out the logic simulation of a complex circuit, logic emulators based on programmable components are used. These logic emulators enable the logic functions of a circuit to be tested at higher speed than with a computer simulation. They are generally used to simulate the complete circuit after each part has been successfully simulated by computer. The logic diagram of the circuit to be simulated is then transposed to the logic emulator.
There has been considerable progress in designing methods in the field of microelectronics. At present, the synchronous type circuits use a general clock for the entire integrated circuit. Furthermore, the clock signals are conveyed directly to the inputs of flip-flop circuits which need clock signals. These rules exist to simplify the designing of the circuits whose complexity is constantly increasing.
Since the former designing methods did not encounter the same constraints, those skilled in the art were led to use combinational logic circuits on clock signals to reduce the size of the circuits. A problem of glitches was taken into account and the combinational circuit was made so that these glitches would be absorbed. The glitches are absorbed by considering the positions of the logic gates with respect to each other when evaluating the propagation time of all the gates. In certain cases, this was also done by assessing the different delays that the signals could have at the input of the combinational logic circuit.
FIG. 1 shows a conventional D type flip-flop circuit 1 having its clock signal input connected to an output of a combinational logic circuit 2. The combinational logic circuit has five inputs, three of the inputs receiving state signals C1 to C3 and the other two inputs receiving two clock signals H1 and H2. The signal present at the output of the combinational logic circuit 2 corresponds to the result of a logic function that combines all the input signals. However, this combinational logic circuit 2 is designed to account for the different propagation times of the elements that form it to avoid having glitches that could affect the flip-flop circuit 1.
Those skilled in the art know that direct transposition of a circuit into new technology may not work. It is therefore necessary to transpose the circuit of FIG. 1 as indicated in FIG. 2. The drawing of FIG. 2 has a multiplexer 3 with two data inputs, one selection input and one output. The first input of the multiplexer 3 receives the data to be memorized or stored. The second input of the multiplexer 3 is connected to the output of the flip-flop circuit 1. The selection input of the multiplexer 3 is connected to the output of the combinational logic circuit 2. The output of the multiplexer 3 is connected to the data input of the flip-flop circuit 1. The clock signal H1 (if the clock signal H1 is the fastest) is connected to the clock signal input of the flip-flop circuit 1. The multiplexer 3 and the flip-flop circuit 1 correspond to a D type flip-flop circuit with data validation input. The input of the flip-flop circuit is validated during an active edge of the clock signal when the output of the combinational logic circuit is active.
However, in certain cases, a transposition of this kind is not appropriate because of various reasons. If, in the original circuit, the clock signals are combined with one another to form a pulse, the pulse may not overlap an active edge of the chosen clock signal. Also, one clock signal may be stopped when another one is active. A clock signal may have a variable frequency. This means that it is not possible to determine which clock must be used to synchronize the flip-flop circuit 1. Other problems may also arise.
The only approach currently available to those skilled in the art is to remake a part of the circuit. However, the reason the circuit is being transposed is precisely to avoid having to make it again. It would be all the more troublesome if it is in the transposition of the circuit to a logic emulator that the problem arises, when computer logic simulations have shown that the concerned circuit works well.